Please use this identifier to cite or link to this item: http://hdl.handle.net/2440/81379
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dc.contributor.authorWang, D.en
dc.contributor.authorWang, J.en
dc.contributor.authorShi, P.en
dc.contributor.authorWang, W.en
dc.date.issued2013en
dc.identifier.citationProceedings of the 10th IEEE International Conference on Control & Automation, ICCA 2013: pp.1633-1638en
dc.identifier.isbn9781467347082en
dc.identifier.issn1948-3449en
dc.identifier.issn1948-3457en
dc.identifier.urihttp://hdl.handle.net/2440/81379-
dc.description.statementofresponsibilityDong Wang, Jianliang Wang, Peng Shi and Wei Wangen
dc.description.urihttp://uav.ece.nus.edu.sg/~ieee-icca2013/en
dc.language.isoenen
dc.publisherIEEEen
dc.rights©2013 IEEEen
dc.titleOutput regulation of time delay systems based on internal model principleen
dc.typeConference paperen
dc.identifier.rmid0020132219en
dc.contributor.conferenceIEEE International Conference on Control and Automation (10th : 2013 : Hangzhou, China)en
dc.identifier.doi10.1109/ICCA.2013.6564887en
dc.publisher.placeUSAen
dc.identifier.pubid17736-
pubs.library.collectionElectrical and Electronic Engineering publicationsen
pubs.verification-statusVerifieden
pubs.publication-statusPublisheden
dc.identifier.orcidShi, P. [0000-0001-8218-586X]en
Appears in Collections:Electrical and Electronic Engineering publications

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